FEBs replacements during 2019 May's integration week:
- GEMROC 4, TIGER 2 and 3: HW_FEB = 8 --> HW_FEB = 17
- GEMROC 4, TIGER 4 and 5: HW_FEB = 7 --> HW_FEB = 18
- GEMROC 6, TIGER 4 and 5: HW_FEB = 39 --> HW_FEB = 5
- GEMROC 7, TIGER 4 and 5: HW_FEB = 23 --> HW_FEB = 52
- GEMROC 9, TIGER 6 and 7: HW_FEB = 14 --> HW_FEB = 7
Missing calibration files for:
- QDC: FEB_label = 2 ( HW_FEB_id = L1FEB6 )
TDC: FEB_label = 18 ( HW_FEB_id = L2FEB18 )TDC: FEB_label = 30 ( HW_FEB_id = L2FEB52 )- TDC: FEB_label = 41 ( HW_FEB_id = L2FEB21 )
Missing calibration for GEMROC 7, TIGER 4 and 5, HW_FEB = 52 replacing HW_FEB_id = 23 (new files are available)
L1 FEB pinout
| GEMROC 0
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 0
|
0
|
5
|
1
|
|
| 0
|
1
|
5
|
2
|
|
| 1
|
2
|
20
|
1
|
|
| 1
|
3
|
20
|
2
|
|
| 2
|
4
|
6
|
1
|
missing calibration?
|
| 2
|
5
|
6
|
2
|
missing calibration?
|
| 3
|
6
|
13
|
1
|
|
| 3
|
7
|
13
|
2
|
|
| GEMROC 1
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 4
|
0
|
14
|
1
|
|
| 4
|
1
|
14
|
2
|
|
| 5
|
2
|
3
|
1
|
|
| 5
|
3
|
3
|
2
|
|
| 6
|
4
|
18
|
1
|
|
| 6
|
5
|
18
|
2
|
|
| 7
|
6
|
19
|
1
|
|
| 7
|
7
|
19
|
2
|
|
| GEMROC 2
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 8
|
0
|
24
|
1
|
|
| 8
|
1
|
24
|
2
|
|
| 9
|
2
|
11
|
1
|
|
| 9
|
3
|
11
|
2
|
|
| 10
|
4
|
22
|
1
|
|
| 10
|
5
|
22
|
2
|
|
| 11
|
6
|
21
|
1
|
|
| 11
|
7
|
21
|
2
|
|
| GEMROC 3
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 12
|
0
|
17
|
1
|
|
| 12
|
1
|
17
|
2
|
|
| 13
|
2
|
25
|
1
|
|
| 13
|
3
|
25
|
2
|
|
| 14
|
4
|
10
|
1
|
|
| 14
|
5
|
10
|
2
|
|
| 15
|
6
|
23
|
1
|
|
| 15
|
7
|
23
|
2
|
|
For Layer 2 channels 61, 62 and 63 are not connected to any strip, hence they should be disabled and not be considered.
L2 FEB pinout
| GEMROC 4
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 16
|
0
|
4
|
1
|
|
| 16
|
1
|
4
|
2
|
|
| 17
|
2
|
17
|
1
|
|
| 17
|
3
|
17
|
2
|
|
| 18
|
4
|
18
|
1
|
|
| 18
|
5
|
18
|
2
|
|
| 19
|
6
|
6
|
1
|
|
| 19
|
7
|
6
|
2
|
|
| GEMROC 5
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 20
|
0
|
9
|
1
|
|
| 20
|
1
|
9
|
2
|
|
| 21
|
2
|
33
|
1
|
|
| 21
|
3
|
33
|
2
|
|
| 22
|
4
|
38
|
1
|
|
| 22
|
5
|
38
|
2
|
|
| 23
|
6
|
34
|
1
|
|
| 23
|
7
|
34
|
2
|
|
| GEMROC 6
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 24
|
0
|
37
|
1
|
|
| 24
|
1
|
37
|
2
|
|
| 25
|
2
|
36
|
1
|
|
| 25
|
3
|
36
|
2
|
|
| 26
|
4
|
5
|
1
|
|
| 26
|
5
|
5
|
2
|
|
| 27
|
6
|
1
|
1
|
|
| 27
|
7
|
1
|
2
|
|
| GEMROC 7
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 28
|
0
|
2
|
1
|
|
| 28
|
1
|
2
|
2
|
|
| 29
|
2
|
19
|
1
|
|
| 29
|
3
|
19
|
2
|
|
| 30
|
4
|
52
|
1
|
missing calibration
|
| 30
|
5
|
52
|
2
|
missing calibration
|
| 31
|
6
|
32
|
1
|
|
| 31
|
7
|
32
|
2
|
|
| GEMROC 8
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 32
|
0
|
30
|
1
|
|
| 32
|
1
|
30
|
2
|
|
| 33
|
2
|
26
|
1
|
|
| 33
|
3
|
26
|
2
|
|
| 34
|
4
|
27
|
1
|
|
| 34
|
5
|
27
|
2
|
|
| 35
|
6
|
29
|
1
|
|
| 35
|
7
|
29
|
2
|
|
| GEMROC 9
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 36
|
0
|
25
|
1
|
|
| 36
|
1
|
25
|
2
|
|
| 37
|
2
|
11
|
1
|
|
| 37
|
3
|
11
|
2
|
|
| 38
|
4
|
12
|
1
|
|
| 38
|
5
|
12
|
2
|
|
| 39
|
6
|
7
|
1
|
|
| 39
|
7
|
7
|
2
|
|
| GEMROC 10
|
| SW_FEB
|
TIGER
|
HW_FEB
|
Chip
|
Notes
|
| 40
|
0
|
20
|
1
|
|
| 40
|
1
|
20
|
2
|
|
| 41
|
2
|
21
|
1
|
|
| 41
|
3
|
21
|
2
|
|
| 42
|
4
|
24
|
1
|
|
| 42
|
5
|
24
|
2
|
|
| 43
|
6
|
3
|
1
|
|
| 43
|
7
|
3
|
2
|
|
