Difference between revisions of "FEB list"
m (→Layer 2) |
m (→Layer 2) |
||
| Line 28: | Line 28: | ||
|- | |- | ||
| 3 | | 3 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB3 Chip1|1]] | | [[L2 FEB3 Chip1|1]] | ||
| [[L2 FEB3 Chip2|2]] | | [[L2 FEB3 Chip2|2]] | ||
| Line 34: | Line 34: | ||
|- | |- | ||
| 4 | | 4 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB4 Chip1|1]] | | [[L2 FEB4 Chip1|1]] | ||
| [[L2 FEB4 Chip2|2]] | | [[L2 FEB4 Chip2|2]] | ||
| Line 40: | Line 40: | ||
|- | |- | ||
| 5 | | 5 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB5 Chip1|1]] | | [[L2 FEB5 Chip1|1]] | ||
| [[L2 FEB5 Chip2|2]] | | [[L2 FEB5 Chip2|2]] | ||
| Line 46: | Line 46: | ||
|- | |- | ||
| 6 | | 6 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB6 Chip1|1]] | | [[L2 FEB6 Chip1|1]] | ||
| [[L2 FEB6 Chip2|2]] | | [[L2 FEB6 Chip2|2]] | ||
| Line 52: | Line 52: | ||
|- | |- | ||
| 7 | | 7 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB7 Chip1|1]] | | [[L2 FEB7 Chip1|1]] | ||
| [[L2 FEB7 Chip2|2]] | | [[L2 FEB7 Chip2|2]] | ||
| Line 64: | Line 64: | ||
|- | |- | ||
| 9 | | 9 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB9 Chip1|1]] | | [[L2 FEB9 Chip1|1]] | ||
| [[L2 FEB9 Chip2|2]] | | [[L2 FEB9 Chip2|2]] | ||
| Line 76: | Line 76: | ||
|- | |- | ||
| 11 | | 11 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB11 Chip1|1]] | | [[L2 FEB11 Chip1|1]] | ||
| [[L2 FEB11 Chip2|2]] | | [[L2 FEB11 Chip2|2]] | ||
| Line 82: | Line 82: | ||
|- | |- | ||
| 12 | | 12 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB12 Chip1|1]] | | [[L2 FEB12 Chip1|1]] | ||
| [[L2 FEB12 Chip2|2]] | | [[L2 FEB12 Chip2|2]] | ||
| Line 112: | Line 112: | ||
|- | |- | ||
| 17 | | 17 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB17 Chip1|1]] | | [[L2 FEB17 Chip1|1]] | ||
| [[L2 FEB17 Chip2|2]] | | [[L2 FEB17 Chip2|2]] | ||
| Line 118: | Line 118: | ||
|- | |- | ||
| 18 | | 18 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB18 Chip1|1]] | | [[L2 FEB18 Chip1|1]] | ||
| [[L2 FEB18 Chip2|2]] | | [[L2 FEB18 Chip2|2]] | ||
| Line 124: | Line 124: | ||
|- | |- | ||
| 19 | | 19 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB19 Chip1|1]] | | [[L2 FEB19 Chip1|1]] | ||
| [[L2 FEB19 Chip2|2]] | | [[L2 FEB19 Chip2|2]] | ||
| Line 130: | Line 130: | ||
|- | |- | ||
| 20 | | 20 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB20 Chip1|1]] | | [[L2 FEB20 Chip1|1]] | ||
| [[L2 FEB20 Chip2|2]] | | [[L2 FEB20 Chip2|2]] | ||
| Line 136: | Line 136: | ||
|- | |- | ||
| 21 | | 21 | ||
| − | | | + | | installed on L2 |
| [[L2 FEB21 Chip1|1]] | | [[L2 FEB21 Chip1|1]] | ||
| [[L2 FEB21 Chip2|2]] | | [[L2 FEB21 Chip2|2]] | ||
Revision as of 20:29, 16 August 2019
Here the status of all FEBs is reported.
Layer 1[edit | edit source]
Layer 2[edit | edit source]
| HW_FEB | Status | Chip 1 | Chip 2 | Notes |
|---|---|---|---|---|
| 1 | installed on L2 | 1 | 2 | Old TB calibration |
| 2 | installed on L2 | 1 | 2 | Old TB calibration |
| 3 | installed on L2 | 1 | 2 | |
| 4 | installed on L2 | 1 | 2 | |
| 5 | installed on L2 | 1 | 2 | |
| 6 | installed on L2 | 1 | 2 | |
| 7 | installed on L2 | 1 | 2 | |
| 8 | 1 | 2 | ||
| 9 | installed on L2 | 1 | 2 | |
| 10 | 1 | 2 | ||
| 11 | installed on L2 | 1 | 2 | |
| 12 | installed on L2 | 1 | 2 | |
| 13 | 1 | 2 | ||
| 14 | 1 | 2 | ||
| 15 | 1 | 2 | ||
| 16 | 1 | 2 | ||
| 17 | installed on L2 | 1 | 2 | |
| 18 | installed on L2 | 1 | 2 | |
| 19 | installed on L2 | 1 | 2 | |
| 20 | installed on L2 | 1 | 2 | |
| 21 | installed on L2 | 1 | 2 | |
| 22 | 1 | 2 | ||
| 23 | 1 | 2 | ||
| 24 | 1 | 2 | ||
| 25 | 1 | 2 | ||
| 26 | 1 | 2 | ||
| 27 | 1 | 2 | ||
| 28 | 1 | 2 | ||
| 29 | 1 | 2 | ||
| 30 | 1 | 2 | ||
| 31 | 1 | 2 | ||
| 32 | 1 | 2 | ||
| 33 | 1 | 2 | ||
| 34 | 1 | 2 | ||
| 35 | 1 | 2 | ||
| 36 | 1 | 2 | ||
| 37 | 1 | 2 | ||
| 38 | 1 | 2 | ||
| 39 | 1 | 2 |
