Difference between revisions of "FEB list"

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m (→‎Layer 1)
m (→‎Layer 1)
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|-
 
|-
 
| 2
 
| 2
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB2 Chip1|1]]
 
| [[L1 FEB2 Chip1|1]]
 
| [[L1 FEB2 Chip2|2]]
 
| [[L1 FEB2 Chip2|2]]
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|-
 
|-
 
| 5
 
| 5
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB5 Chip1|1]]
 
| [[L1 FEB5 Chip1|1]]
 
| [[L1 FEB5 Chip2|2]]
 
| [[L1 FEB5 Chip2|2]]
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|-
 
|-
 
| 9
 
| 9
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB9 Chip1|1]]
 
| [[L1 FEB9 Chip1|1]]
 
| [[L1 FEB9 Chip2|2]]
 
| [[L1 FEB9 Chip2|2]]
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|-
 
|-
 
| 10
 
| 10
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB10 Chip1|1]]
 
| [[L1 FEB10 Chip1|1]]
 
| [[L1 FEB10 Chip2|2]]
 
| [[L1 FEB10 Chip2|2]]
Line 86: Line 86:
 
|-
 
|-
 
| 13
 
| 13
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB13 Chip1|1]]
 
| [[L1 FEB13 Chip1|1]]
 
| [[L1 FEB13 Chip2|2]]
 
| [[L1 FEB13 Chip2|2]]
Line 134: Line 134:
 
|-
 
|-
 
| 21
 
| 21
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB21 Chip1|1]]
 
| [[L1 FEB21 Chip1|1]]
 
| [[L1 FEB21 Chip2|2]]
 
| [[L1 FEB21 Chip2|2]]
Line 140: Line 140:
 
|-
 
|-
 
| 22
 
| 22
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB22 Chip1|1]]
 
| [[L1 FEB22 Chip1|1]]
 
| [[L1 FEB22 Chip2|2]]
 
| [[L1 FEB22 Chip2|2]]
Line 158: Line 158:
 
|-
 
|-
 
| 25
 
| 25
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB25 Chip1|1]]
 
| [[L1 FEB25 Chip1|1]]
 
| [[L1 FEB25 Chip2|2]]
 
| [[L1 FEB25 Chip2|2]]
Line 164: Line 164:
 
|-
 
|-
 
| 26
 
| 26
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB26 Chip1|1]]
 
| [[L1 FEB26 Chip1|1]]
 
| [[L1 FEB26 Chip2|2]]
 
| [[L1 FEB26 Chip2|2]]
Line 170: Line 170:
 
|-
 
|-
 
| 27
 
| 27
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB27 Chip1|1]]
 
| [[L1 FEB27 Chip1|1]]
 
| [[L1 FEB27 Chip2|2]]
 
| [[L1 FEB27 Chip2|2]]
Line 182: Line 182:
 
|-
 
|-
 
| 29
 
| 29
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB29 Chip1|1]]
 
| [[L1 FEB29 Chip1|1]]
 
| [[L1 FEB29 Chip2|2]]
 
| [[L1 FEB29 Chip2|2]]
Line 188: Line 188:
 
|-
 
|-
 
| 30
 
| 30
−
| IHEP: ready for nL1
+
| '''IHEP: ready for nL1'''
 
| [[L1 FEB30 Chip1|1]]
 
| [[L1 FEB30 Chip1|1]]
 
| [[L1 FEB30 Chip2|2]]
 
| [[L1 FEB30 Chip2|2]]
 +
|
 +
|-
 +
| 31
 +
|
 +
| [[L1 FEB31 Chip1|1]]
 +
| [[L1 FEB31 Chip2|2]]
 +
|
 +
|-
 +
| 32
 +
|
 +
| [[L1 FEB32 Chip1|1]]
 +
| [[L1 FEB32 Chip2|2]]
 +
|
 +
|-
 +
| 33
 +
|
 +
| [[L1 FEB33 Chip1|1]]
 +
| [[L1 FEB33 Chip2|2]]
 +
|
 +
|-
 +
| 34
 +
|
 +
| [[L1 FEB34 Chip1|1]]
 +
| [[L1 FEB34 Chip2|2]]
 +
|
 +
|-
 +
| 35
 +
|
 +
| [[L1 FEB35 Chip1|1]]
 +
| [[L1 FEB35 Chip2|2]]
 +
|
 +
|-
 +
| 36
 +
|
 +
| [[L1 FEB36 Chip1|1]]
 +
| [[L1 FEB36 Chip2|2]]
 
|  
 
|  
 
|-
 
|-

Revision as of 05:18, 25 September 2019

Here the status of all FEBs is reported.

Layer 1[edit | edit source]

HW_FEB Status Chip 1 Chip 2 Notes
1 1 2
2 IHEP: ready for nL1 1 2
3 back to Torino 1 2
4 1 2
5 IHEP: ready for nL1 1 2
6 back to Torino 1 2 missing calibration files
7 1 2
8 1 2
9 IHEP: ready for nL1 1 2
10 IHEP: ready for nL1 1 2 old TB calibration
11 installed on oL1 1 2
12 1 2
13 IHEP: ready for nL1 1 2
14 installed on oL1 1 2
15 1 2
16 1 2
17 installed on oL1 1 2
18 back to Torino 1 2
19 back to Torino 1 2 old TB calibration
20 installed on oL1 1 2 old TB calibration
21 IHEP: ready for nL1 1 2
22 IHEP: ready for nL1 1 2
23 back to Torino 1 2
24 back to Torino 1 2
25 IHEP: ready for nL1 1 2
26 IHEP: ready for nL1 1 2
27 IHEP: ready for nL1 1 2
28 1 2
29 IHEP: ready for nL1 1 2
30 IHEP: ready for nL1 1 2
31 1 2
32 1 2
33 1 2
34 1 2
35 1 2
36 1 2

Layer 2[edit | edit source]

HW_FEB Status Chip 1 Chip 2 Notes
1 installed on L2 1 2 old TB calibration
2 installed on L2 1 2 old TB calibration
3 installed on L2 1 2
4 installed on L2 1 2
5 1 2
6 installed on L2 1 2
7 installed on L2 1 2
8 1 2
9 installed on L2 1 2
10 1 2
11 removed from L2 (Sep 2019) 1 2 high noise and dead channels
12 installed on L2 1 2
13 1 2
14 1 2
15 1 2
16 1 2
17 installed on L2 1 2
18 installed on L2 1 2
19 installed on L2 1 2
20 installed on L2 1 2
21 installed on L2 1 2
22 1 2
23 1 2
24 installed on L2 1 2
25 installed on L2 1 2
26 installed on L2 1 2
27 installed on L2 1 2
28 1 2
29 removed from L2 (Sep 2019) 1 2 missing TP on chip 1
30 installed on L2 1 2
31 1 2
32 installed on L2 1 2
33 installed on L2 1 2
34 installed on L2 1 2
35 1 2
36 installed on L2 1 2
37 installed on L2 1 2
38 installed on L2 1 2
50 installed on L2 1 2
52 installed on L2 1 2
53 1 2
54 1 2
55 1 2
56 installed on L2 1 2
57 installed on L2 1 2

Layer 3[edit | edit source]

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