Difference between revisions of "FEB list"

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m (→‎Layer 3)
m (→‎Layer 3)
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|-
 
|-
 
| 1
 
| 1
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|  
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|'''IHEP (in)'''
 
| [[L3 FEB1 Chip1|1]]
 
| [[L3 FEB1 Chip1|1]]
 
| [[L3 FEB1 Chip2|2]]
 
| [[L3 FEB1 Chip2|2]]
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|-
 
|-
 
| 2
 
| 2
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|  
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|'''IHEP (in)'''
 
| [[L3 FEB2 Chip1|1]]
 
| [[L3 FEB2 Chip1|1]]
 
| [[L3 FEB2 Chip2|2]]
 
| [[L3 FEB2 Chip2|2]]
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|-
 
|-
 
| 3
 
| 3
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB3 Chip1|1]]
 
| [[L3 FEB3 Chip1|1]]
 
| [[L3 FEB3 Chip2|2]]
 
| [[L3 FEB3 Chip2|2]]
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|-
 
|-
 
| 4
 
| 4
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|  
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|'''IHEP (in)'''
 
| [[L3 FEB4 Chip1|1]]
 
| [[L3 FEB4 Chip1|1]]
 
| [[L3 FEB4 Chip2|2]]
 
| [[L3 FEB4 Chip2|2]]
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|-
 
|-
 
| 5
 
| 5
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|  
+
|'''IHEP (in)'''
 
| [[L3 FEB5 Chip1|1]]
 
| [[L3 FEB5 Chip1|1]]
 
| [[L3 FEB5 Chip2|2]]
 
| [[L3 FEB5 Chip2|2]]
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|-
 
|-
 
| 7
 
| 7
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB7 Chip1|1]]
 
| [[L3 FEB7 Chip1|1]]
 
| [[L3 FEB7 Chip2|2]]
 
| [[L3 FEB7 Chip2|2]]
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|-
 
|-
 
| 8
 
| 8
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB8 Chip1|1]]
 
| [[L3 FEB8 Chip1|1]]
 
| [[L3 FEB8 Chip2|2]]
 
| [[L3 FEB8 Chip2|2]]
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|-
 
|-
 
| 9
 
| 9
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|  
+
|'''IHEP (planar)'''
 
| [[L3 FEB9 Chip1|1]]
 
| [[L3 FEB9 Chip1|1]]
 
| [[L3 FEB9 Chip2|2]]
 
| [[L3 FEB9 Chip2|2]]
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|-
 
|-
 
| 10
 
| 10
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|  
+
|'''IHEP (in)'''
 
| [[L3 FEB10 Chip1|1]]
 
| [[L3 FEB10 Chip1|1]]
 
| [[L3 FEB10 Chip2|2]]
 
| [[L3 FEB10 Chip2|2]]
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|-
 
|-
 
| 12
 
| 12
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB12 Chip1|1]]
 
| [[L3 FEB12 Chip1|1]]
 
| [[L3 FEB12 Chip2|2]]
 
| [[L3 FEB12 Chip2|2]]
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|-
 
|-
 
| 13
 
| 13
−
|  
+
|'''IHEP (spare)'''
 
| [[L3 FEB13 Chip1|1]]
 
| [[L3 FEB13 Chip1|1]]
 
| [[L3 FEB13 Chip2|2]]
 
| [[L3 FEB13 Chip2|2]]
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|-
 
|-
 
| 15
 
| 15
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB15 Chip1|1]]
 
| [[L3 FEB15 Chip1|1]]
 
| [[L3 FEB15 Chip2|2]]
 
| [[L3 FEB15 Chip2|2]]
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|-
 
|-
 
| 16
 
| 16
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB16 Chip1|1]]
 
| [[L3 FEB16 Chip1|1]]
 
| [[L3 FEB16 Chip2|2]]
 
| [[L3 FEB16 Chip2|2]]
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|-
 
|-
 
| 17
 
| 17
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB17 Chip1|1]]
 
| [[L3 FEB17 Chip1|1]]
 
| [[L3 FEB17 Chip2|2]]
 
| [[L3 FEB17 Chip2|2]]
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|-
 
|-
 
| 18
 
| 18
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|  
+
|'''IHEP (in)'''
 
| [[L3 FEB18 Chip1|1]]
 
| [[L3 FEB18 Chip1|1]]
 
| [[L3 FEB18 Chip2|2]]
 
| [[L3 FEB18 Chip2|2]]
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|-
 
|-
 
| 19
 
| 19
−
|  
+
|'''IHEP (spare)'''
 
| [[L3 FEB19 Chip1|1]]
 
| [[L3 FEB19 Chip1|1]]
 
| [[L3 FEB19 Chip2|2]]
 
| [[L3 FEB19 Chip2|2]]
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|-
 
|-
 
| 20
 
| 20
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB20 Chip1|1]]
 
| [[L3 FEB20 Chip1|1]]
 
| [[L3 FEB20 Chip2|2]]
 
| [[L3 FEB20 Chip2|2]]
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|-
 
|-
 
| 21
 
| 21
−
|  
+
|'''IHEP (spare)'''
 
| [[L3 FEB21 Chip1|1]]
 
| [[L3 FEB21 Chip1|1]]
 
| [[L3 FEB21 Chip2|2]]
 
| [[L3 FEB21 Chip2|2]]
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|-
 
|-
 
| 22
 
| 22
−
|  
+
|'''IHEP (planar)'''
 
| [[L3 FEB22 Chip1|1]]
 
| [[L3 FEB22 Chip1|1]]
 
| [[L3 FEB22 Chip2|2]]
 
| [[L3 FEB22 Chip2|2]]
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|-
 
|-
 
| 23
 
| 23
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB23 Chip1|1]]
 
| [[L3 FEB23 Chip1|1]]
 
| [[L3 FEB23 Chip2|2]]
 
| [[L3 FEB23 Chip2|2]]
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|-
 
|-
 
| 24
 
| 24
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB24 Chip1|1]]
 
| [[L3 FEB24 Chip1|1]]
 
| [[L3 FEB24 Chip2|2]]
 
| [[L3 FEB24 Chip2|2]]
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|-
 
|-
 
| 25
 
| 25
−
|  
+
|'''IHEP (spare)'''
 
| [[L3 FEB25 Chip1|1]]
 
| [[L3 FEB25 Chip1|1]]
 
| [[L3 FEB25 Chip2|2]]
 
| [[L3 FEB25 Chip2|2]]
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|-
 
|-
 
| 26
 
| 26
−
|  
+
|'''IHEP (planar)'''
 
| [[L3 FEB26 Chip1|1]]
 
| [[L3 FEB26 Chip1|1]]
 
| [[L3 FEB26 Chip2|2]]
 
| [[L3 FEB26 Chip2|2]]
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|-
 
|-
 
| 27
 
| 27
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB27 Chip1|1]]
 
| [[L3 FEB27 Chip1|1]]
 
| [[L3 FEB27 Chip2|2]]
 
| [[L3 FEB27 Chip2|2]]
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|-
 
|-
 
| 29
 
| 29
−
|  
+
|'''IHEP (planar)'''
 
| [[L3 FEB29 Chip1|1]]
 
| [[L3 FEB29 Chip1|1]]
 
| [[L3 FEB29 Chip2|2]]
 
| [[L3 FEB29 Chip2|2]]
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|-
 
|-
 
| 30
 
| 30
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB30 Chip1|1]]
 
| [[L3 FEB30 Chip1|1]]
 
| [[L3 FEB30 Chip2|2]]
 
| [[L3 FEB30 Chip2|2]]
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|-
 
|-
 
| 31
 
| 31
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB31 Chip1|1]]
 
| [[L3 FEB31 Chip1|1]]
 
| [[L3 FEB31 Chip2|2]]
 
| [[L3 FEB31 Chip2|2]]
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|-
 
|-
 
| 32
 
| 32
−
|  
+
|'''IHEP (planar)'''
 
| [[L3 FEB32 Chip1|1]]
 
| [[L3 FEB32 Chip1|1]]
 
| [[L3 FEB32 Chip2|2]]
 
| [[L3 FEB32 Chip2|2]]
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|-
 
|-
 
| 33
 
| 33
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB33 Chip1|1]]
 
| [[L3 FEB33 Chip1|1]]
 
| [[L3 FEB33 Chip2|2]]
 
| [[L3 FEB33 Chip2|2]]
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|-
 
|-
 
| 36
 
| 36
−
|  
+
|'''IHEP (planar)'''
 
| [[L3 FEB36 Chip1|1]]
 
| [[L3 FEB36 Chip1|1]]
 
| [[L3 FEB36 Chip2|2]]
 
| [[L3 FEB36 Chip2|2]]
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|-
 
|-
 
| 37
 
| 37
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB37 Chip1|1]]
 
| [[L3 FEB37 Chip1|1]]
 
| [[L3 FEB37 Chip2|2]]
 
| [[L3 FEB37 Chip2|2]]
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|-
 
| 39
 
| 39
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB39 Chip1|1]]
 
| [[L3 FEB39 Chip1|1]]
 
| [[L3 FEB39 Chip2|2]]
 
| [[L3 FEB39 Chip2|2]]
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|-
 
|-
 
| 40
 
| 40
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB40 Chip1|1]]
 
| [[L3 FEB40 Chip1|1]]
 
| [[L3 FEB40 Chip2|2]]
 
| [[L3 FEB40 Chip2|2]]
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|-
 
|-
 
| 41
 
| 41
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB41 Chip1|1]]
 
| [[L3 FEB41 Chip1|1]]
 
| [[L3 FEB41 Chip2|2]]
 
| [[L3 FEB41 Chip2|2]]
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|-
 
|-
 
| 42
 
| 42
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB42 Chip1|1]]
 
| [[L3 FEB42 Chip1|1]]
 
| [[L3 FEB42 Chip2|2]]
 
| [[L3 FEB42 Chip2|2]]
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|-
 
|-
 
| 44
 
| 44
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB44 Chip1|1]]
 
| [[L3 FEB44 Chip1|1]]
 
| [[L3 FEB44 Chip2|2]]
 
| [[L3 FEB44 Chip2|2]]
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|-
 
|-
 
| 45
 
| 45
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB45 Chip1|1]]
 
| [[L3 FEB45 Chip1|1]]
 
| [[L3 FEB45 Chip2|2]]
 
| [[L3 FEB45 Chip2|2]]
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|-
 
|-
 
| 47
 
| 47
−
|  
+
|'''IHEP (in)'''
 
| [[L3 FEB47 Chip1|1]]
 
| [[L3 FEB47 Chip1|1]]
 
| [[L3 FEB47 Chip2|2]]
 
| [[L3 FEB47 Chip2|2]]
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|-
 
|-
 
| 48
 
| 48
−
|  
+
|'''IHEP (spare)'''
 
| [[L3 FEB48 Chip1|1]]
 
| [[L3 FEB48 Chip1|1]]
 
| [[L3 FEB48 Chip2|2]]
 
| [[L3 FEB48 Chip2|2]]
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|-
 
|-
 
| 49
 
| 49
−
|  
+
|'''IHEP (out)'''
 
| [[L3 FEB49 Chip1|1]]
 
| [[L3 FEB49 Chip1|1]]
 
| [[L3 FEB49 Chip2|2]]
 
| [[L3 FEB49 Chip2|2]]

Revision as of 01:32, 4 October 2019

Here the status of all FEBs is reported.

Layer 1[edit | edit source]

HW_FEB Status Chip 1 Chip 2 Notes
1 Torino 1 2 da Marco, rinominata in 61
2 IHEP: ready for nL1 1 2
3 back to Torino 1 2
4 Torino 1 2 da Marco
5 IHEP: ready for nL1 1 2
6 back to Torino 1 2 missing calibration files
7 Torino 1 2
8 IHEP: ready for nL1 1 2
9 IHEP: ready for nL1? 1 2 Tx align when tilted?
10 IHEP: ready for nL1 1 2 old TB calibration
11 installed on oL1 1 2
12 Torino 1 2
13 IHEP: ready for nL1 1 2
14 installed on oL1 1 2
15 1 2 missing
16 IHEP: ready for nL1 1 2
17 installed on oL1 1 2
18 back to Torino 1 2
19 back to Torino 1 2 old TB calibration
20 installed on oL1 1 2 old TB calibration
21 IHEP: ready for nL1 1 2
22 IHEP: ready for nL1 1 2
23 back to Torino 1 2
24 back to Torino 1 2
25 IHEP: ready for nL1 1 2
26 IHEP: ready for nL1 1 2
27 IHEP: ready for nL1 1 2
28 Torino 1 2
29 IHEP: ready for nL1 1 2
30 IHEP: ready for nL1 1 2
31 Torino 1 2
32 Torino 1 2
33 Torino 1 2
34 Torino 1 2
35 Torino 1 2
** 1 2 missing from old production? 
New production starting from FEB 26 (10 FEBs --> FEB26-35)

Layer 2[edit | edit source]

HW_FEB Status Chip 1 Chip 2 Notes
1 installed on L2 1 2 old TB calibration
2 installed on L2 1 2 old TB calibration
3 installed on L2 1 2
4 installed on L2 1 2
5 Torino 1 2 spare? already calibrated
6 installed on L2 1 2
7 installed on L2 1 2
8 Torino 1 2 spare? already calibrated
9 installed on L2 1 2
10 AEMME 1 2
11 removed from L2 (Sep 2019) 1 2 high noise and dead channels
12 installed on L2 1 2
13 Torino 1 2
14 Torino 1 2
15 Torino 1 2 spare? already calibrated
16 Torino 1 2
17 installed on L2 1 2
18 installed on L2 1 2
19 installed on L2 1 2
20 installed on L2 1 2
21 installed on L2 1 2
22 Torino 1 2
23 Torino 1 2
24 installed on L2 1 2
25 installed on L2 1 2
26 installed on L2 1 2
27 installed on L2 1 2
28 1 2 missing
29 removed from L2 (Sep 2019) 1 2 missing TP on chip 1
30 installed on L2 1 2
31 Torino 1 2
32 installed on L2 1 2
33 installed on L2 1 2
34 installed on L2 1 2
35 Torino 1 2
36 installed on L2 1 2
37 installed on L2 1 2
38 installed on L2 1 2
39 Torino 1 2
49 Torino 1 2 spare? to be calibrated
50 installed on L2 (Sep 2019) 1 2
51 Torino 1 2
52 installed on L2 1 2
53 IHEP: spare for L2 1 2
54 Torino 1 2
55 IHEP: spare for L2 1 2
56 installed on L2 (Sep 2019) 1 2
57 installed on L2 (Sep 2019) 1 2
58 Torino 1 2 spare? to be tested

Layer 3[edit | edit source]

HW_FEB Status Chip 1 Chip 2 Notes
1 IHEP (in) 1 2
2 IHEP (in) 1 2
3 IHEP (in) 1 2
4 IHEP (in) 1 2
5 IHEP (in) 1 2
6 1 2
7 IHEP (in) 1 2
8 IHEP (out) 1 2
9 IHEP (planar) 1 2
10 IHEP (in) 1 2
11 1 2
12 IHEP (in) 1 2
13 IHEP (spare) 1 2
14 1 2
15 IHEP (out) 1 2
16 IHEP (in) 1 2
17 IHEP (out) 1 2
18 IHEP (in) 1 2
19 IHEP (spare) 1 2
20 IHEP (out) 1 2
21 IHEP (spare) 1 2
22 IHEP (planar) 1 2
23 IHEP (in) 1 2
24 IHEP (in) 1 2
25 IHEP (spare) 1 2
26 IHEP (planar) 1 2
27 IHEP (out) 1 2
28 1 2
29 IHEP (planar) 1 2
30 IHEP (in) 1 2
31 IHEP (out) 1 2
32 IHEP (planar) 1 2
33 IHEP (out) 1 2
34 1 2
35 1 2
36 IHEP (planar) 1 2
37 IHEP (out) 1 2
38 1 2
39 IHEP (in) 1 2
40 IHEP (out) 1 2
41 IHEP (in) 1 2
42 IHEP (in) 1 2
43 1 2
44 IHEP (out) 1 2
45 IHEP (out) 1 2
46 1 2
47 IHEP (in) 1 2
48 IHEP (spare) 1 2
49 IHEP (out) 1 2
50 1 2
51 1 2
52 1 2
53 1 2
54 1 2
55 1 2
56 1 2
57 1 2
58 1 2
59 1 2
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