Difference between revisions of "FEB list"
m (→HW_FEB list) |
m (→JULY2023) |
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__TOC__ | __TOC__ | ||
− | == Layer 1 == | + | ==Layer 1== |
− | Current number of good FEBs = | + | Current number of good FEBs = 20/16 |
[[L1 FEB pinout|L1 anode-FEB connector pinout]] | [[L1 FEB pinout|L1 anode-FEB connector pinout]] | ||
− | === HW_FEB list === | + | ===HW_FEB list=== |
{| class="wikitable" style="text-align: center; color: black;" | {| class="wikitable" style="text-align: center; color: black;" | ||
|- | |- | ||
− | ! scope="col" | HW_FEB | + | ! scope="col" |HW_FEB |
− | ! scope="col" | Status | + | ! scope="col" |Status |
− | ! scope="col" | Chip 1 | + | ! scope="col" |Chip 1 |
− | ! scope="col" | Chip 2 | + | ! scope="col" |Chip 2 |
− | ! scope="col" | Notes | + | ! scope="col" |Notes |
|- | |- | ||
− | | 1 | + | |1 |
− | | Torino | + | |Torino |
− | | [[L1 FEB1 Chip1|1]] | + | |[[L1 FEB1 Chip1|1]] |
− | | [[L1 FEB1 Chip2|2]] | + | |[[L1 FEB1 Chip2|2]] |
− | | broken connector | + | |broken connector |
|- | |- | ||
− | | 2 | + | |2 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB2 Chip1|1]] | + | |[[L1 FEB2 Chip1|1]] |
− | | [[L1 FEB2 Chip2|2]] | + | |[[L1 FEB2 Chip2|2]] |
− | | '''IHEP (in)''' | + | |'''IHEP (in)''' |
|- | |- | ||
− | | 3 | + | |3 |
− | | back to Torino | + | |back to Torino |
− | | [[L1 FEB3 Chip1|1]] | + | |[[L1 FEB3 Chip1|1]] |
− | | [[L1 FEB3 Chip2|2]] | + | |[[L1 FEB3 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 4 | + | |4 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB4 Chip1|1]] | + | |[[L1 FEB4 Chip1|1]] |
− | | [[L1 FEB4 Chip2|2]] | + | |[[L1 FEB4 Chip2|2]] |
|'''IHEP (out)''' | |'''IHEP (out)''' | ||
|- | |- | ||
− | | 5 | + | |5 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB5 Chip1|1]] | + | |[[L1 FEB5 Chip1|1]] |
− | | [[L1 FEB5 Chip2|2]] | + | |[[L1 FEB5 Chip2|2]] |
− | | '''IHEP (in)''' | + | |'''IHEP (in)''' |
|- | |- | ||
− | | 6 | + | |6 |
− | | back to Torino | + | |back to Torino |
− | | [[L1 FEB6 Chip1|1]] | + | |[[L1 FEB6 Chip1|1]] |
− | | [[L1 FEB6 Chip2|2]] | + | |[[L1 FEB6 Chip2|2]] |
− | | missing calibration files | + | |missing calibration files |
|- | |- | ||
− | | 7 | + | |7 |
− | | Torino | + | |Torino |
− | | [[L1 FEB7 Chip1|1]] | + | |[[L1 FEB7 Chip1|1]] |
− | | [[L1 FEB7 Chip2|2]] | + | |[[L1 FEB7 Chip2|2]] |
− | | broken ESD protection diode | + | |broken ESD protection diode |
|- | |- | ||
− | | 8 | + | |8 |
− | | | + | |Torino |
− | | [[L1 FEB8 Chip1|1]] | + | |[[L1 FEB8 Chip1|1]] |
− | | [[L1 FEB8 Chip2|2]] | + | |[[L1 FEB8 Chip2|2]] |
− | | | + | |1 dead channel (chip 1) |
+ | |||
+ | + config errors (chip 2) | ||
|- | |- | ||
− | | 9 | + | |9 |
− | | | + | |'''IHEP''' |
− | | [[L1 FEB9 Chip1|1]] | + | |[[L1 FEB9 Chip1|1]] |
− | | [[L1 FEB9 Chip2|2]] | + | |[[L1 FEB9 Chip2|2]] |
− | | | + | |SPARE (Tx align when tilted?) |
|- | |- | ||
− | | 10 | + | |10 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB10 Chip1|1]] | + | |[[L1 FEB10 Chip1|1]] |
− | | [[L1 FEB10 Chip2|2]] | + | |[[L1 FEB10 Chip2|2]] |
− | | '''IHEP (in)''' (old TB calibration) | + | |'''IHEP (in)''' (old TB calibration) |
|- | |- | ||
− | | 11 | + | |11 |
− | | ''left on oL1'' | + | |''left on oL1'' |
− | | [[L1 FEB11 Chip1|1]] | + | |[[L1 FEB11 Chip1|1]] |
− | | [[L1 FEB11 Chip2|2]] | + | |[[L1 FEB11 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 12 | + | |12 |
− | | Torino | + | |Torino |
− | | [[L1 FEB12 Chip1|1]] | + | |[[L1 FEB12 Chip1|1]] |
− | | [[L1 FEB12 Chip2|2]] | + | |[[L1 FEB12 Chip2|2]] |
− | | leakage | + | |leakage |
|- | |- | ||
− | | 13 | + | |13 |
− | | | + | |'''IHEP''' |
− | | [[L1 FEB13 Chip1|1]] | + | |[[L1 FEB13 Chip1|1]] |
− | | [[L1 FEB13 Chip2|2]] | + | |[[L1 FEB13 Chip2|2]] |
− | | broken ESD protection diodes and Res | + | |broken ESD protection diodes and Res |
− | repaired, | + | repaired, SPARE |
|- | |- | ||
− | | 14 | + | |14 |
− | | ''left on oL1'' | + | |''left on oL1'' |
− | | [[L1 FEB14 Chip1|1]] | + | |[[L1 FEB14 Chip1|1]] |
− | | [[L1 FEB14 Chip2|2]] | + | |[[L1 FEB14 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 15 | + | |15 |
− | | | + | | |
− | | [[L1 FEB15 Chip1|1]] | + | |[[L1 FEB15 Chip1|1]] |
− | | [[L1 FEB15 Chip2|2]] | + | |[[L1 FEB15 Chip2|2]] |
− | | missing | + | |missing |
|- | |- | ||
− | | 16 | + | |16 |
− | | | + | |'''IHEP''' |
− | | [[L1 FEB16 Chip1|1]] | + | |[[L1 FEB16 Chip1|1]] |
− | | [[L1 FEB16 Chip2|2]] | + | |[[L1 FEB16 Chip2|2]] |
− | | | + | |SPARE |
|- | |- | ||
− | | 17 | + | |17 |
− | | ''left on oL1'' | + | |''left on oL1'' |
− | | [[L1 FEB17 Chip1|1]] | + | |[[L1 FEB17 Chip1|1]] |
− | | [[L1 FEB17 Chip2|2]] | + | |[[L1 FEB17 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 18 | + | |18 |
− | | back to Torino | + | |back to Torino |
− | | [[L1 FEB18 Chip1|1]] | + | |[[L1 FEB18 Chip1|1]] |
− | | [[L1 FEB18 Chip2|2]] | + | |[[L1 FEB18 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 19 | + | |19 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB19 Chip1|1]] | + | |[[L1 FEB19 Chip1|1]] |
− | | [[L1 FEB19 Chip2|2]] | + | |[[L1 FEB19 Chip2|2]] |
− | | '''IHEP (out)''' | + | |'''IHEP (out)''' |
|- | |- | ||
− | | 20 | + | |20 |
− | | ''left on oL1'' | + | |''left on oL1'' |
− | | [[L1 FEB20 Chip1|1]] | + | |[[L1 FEB20 Chip1|1]] |
− | | [[L1 FEB20 Chip2|2]] | + | |[[L1 FEB20 Chip2|2]] |
− | | old TB calibration | + | |old TB calibration |
|- | |- | ||
− | | 21 | + | |21 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB21 Chip1|1]] | + | |[[L1 FEB21 Chip1|1]] |
− | | [[L1 FEB21 Chip2|2]] | + | |[[L1 FEB21 Chip2|2]] |
− | | '''IHEP (in)''' | + | |'''IHEP (in)''' |
|- | |- | ||
− | | 22 | + | |22 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB22 Chip1|1]] | + | |[[L1 FEB22 Chip1|1]] |
− | | [[L1 FEB22 Chip2|2]] | + | |[[L1 FEB22 Chip2|2]] |
− | | '''IHEP (out)''' | + | |'''IHEP (out)''' |
|- | |- | ||
− | | 23 | + | |23 |
− | | back to Torino | + | |back to Torino |
− | | [[L1 FEB23 Chip1|1]] | + | |[[L1 FEB23 Chip1|1]] |
− | | [[L1 FEB23 Chip2|2]] | + | |[[L1 FEB23 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 24 | + | |24 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB24 Chip1|1]] | + | |[[L1 FEB24 Chip1|1]] |
− | | [[L1 FEB24 Chip2|2]] | + | |[[L1 FEB24 Chip2|2]] |
− | | '''IHEP (out)''' | + | |'''IHEP (out)''' |
|- | |- | ||
− | | 25 | + | |25 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB25 Chip1|1]] | + | |[[L1 FEB25 Chip1|1]] |
− | | [[L1 FEB25 Chip2|2]] | + | |[[L1 FEB25 Chip2|2]] |
− | | '''IHEP (in)''' | + | |'''IHEP (in)''' |
|- | |- | ||
− | | 26 | + | |26 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB26 Chip1|1]] | + | |[[L1 FEB26 Chip1|1]] |
− | | [[L1 FEB26 Chip2|2]] | + | |[[L1 FEB26 Chip2|2]] |
− | | '''IHEP (out)''' | + | |'''IHEP (out)''' |
|- | |- | ||
− | | 27 | + | |27 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB27 Chip1|1]] | + | |[[L1 FEB27 Chip1|1]] |
− | | [[L1 FEB27 Chip2|2]] | + | |[[L1 FEB27 Chip2|2]] |
− | | '''IHEP (out)''' | + | |'''IHEP (out)''' |
|- | |- | ||
− | | 28 | + | |28 |
− | | | + | |'''IHEP''' |
− | | [[L1 FEB28 Chip1|1]] | + | |[[L1 FEB28 Chip1|1]] |
− | | [[L1 FEB28 Chip2|2]] | + | |[[L1 FEB28 Chip2|2]] |
− | | | + | |SPARE |
|- | |- | ||
− | | 29 | + | |29 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB29 Chip1|1]] | + | |[[L1 FEB29 Chip1|1]] |
− | | [[L1 FEB29 Chip2|2]] | + | |[[L1 FEB29 Chip2|2]] |
− | | '''IHEP (in)''' | + | |'''IHEP (in)''' |
|- | |- | ||
− | | 30 | + | |30 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB30 Chip1|1]] | + | |[[L1 FEB30 Chip1|1]] |
− | | [[L1 FEB30 Chip2|2]] | + | |[[L1 FEB30 Chip2|2]] |
− | | '''IHEP (out)''' | + | |'''IHEP (out)''' |
|- | |- | ||
− | | 31 | + | |31 |
− | | Torino | + | |Torino |
− | | [[L1 FEB31 Chip1|1]] | + | |[[L1 FEB31 Chip1|1]] |
− | | [[L1 FEB31 Chip2|2]] | + | |[[L1 FEB31 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 32 | + | |32 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB32 Chip1|1]] | + | |[[L1 FEB32 Chip1|1]] |
− | | [[L1 FEB32 Chip2|2]] | + | |[[L1 FEB32 Chip2|2]] |
− | | '''IHEP (out)''' | + | |'''IHEP (out)''' |
|- | |- | ||
− | | 33 | + | |33 |
− | | Torino | + | |Torino |
− | | [[L1 FEB33 Chip1|1]] | + | |[[L1 FEB33 Chip1|1]] |
− | | [[L1 FEB33 Chip2|2]] | + | |[[L1 FEB33 Chip2|2]] |
− | | | + | |1 dead channel (chip 1) |
+ | |||
+ | + config errors (chip 2) | ||
|- | |- | ||
− | | 34 | + | |34 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB34 Chip1|1]] | + | |[[L1 FEB34 Chip1|1]] |
− | | [[L1 FEB34 Chip2|2]] | + | |[[L1 FEB34 Chip2|2]] |
− | | '''IHEP (in)''' | + | |'''IHEP (in)''' |
|- | |- | ||
− | | 35 | + | |35 |
− | | Torino | + | |Torino |
− | | [[L1 FEB35 Chip1|1]] | + | |[[L1 FEB35 Chip1|1]] |
− | | [[L1 FEB35 Chip2|2]] | + | |[[L1 FEB35 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 61 | + | |61 |
− | | '''installed on L1''' | + | |'''installed on L1''' |
− | | [[L1 FEB61 Chip1|1]] | + | |[[L1 FEB61 Chip1|1]] |
− | | [[L1 FEB61 Chip2|2]] | + | |[[L1 FEB61 Chip2|2]] |
− | | '''IHEP (in)'''(old production) | + | |'''IHEP (in)'''(old production) |
|- | |- | ||
|} | |} | ||
Line 245: | Line 249: | ||
New production starting from FEB 26 (10 FEBs --> FEB26-35) | New production starting from FEB 26 (10 FEBs --> FEB26-35) | ||
− | === Spare FEBs ranking === | + | ===Spare FEBs ranking=== |
+ | |||
+ | ====OLD==== | ||
+ | #<del>'''FEB10''': no dead channels (old TB calibration)<del> | ||
+ | #'''FEB13''': no dead channels (repaired ESD protection circuit components) | ||
+ | #'''FEB16''': 1 dead channel | ||
+ | #'''FEB28''': 2 dead channels | ||
+ | #'''FEB9''': 2 dead channels + Tx align issues when tilted | ||
+ | #<del>'''FEB33''': 1 dead channel (chip 2 config errors) --> DO NOT USE<del> | ||
+ | #<del>'''FEB8''': 1 dead channel (chip 2 config errors) --> DO NOT USE<del> | ||
+ | |||
+ | |||
+ | ====JULY 2023==== | ||
+ | #'''FEB38''': no dead channels | ||
+ | #'''FEB41''': no dead channels | ||
+ | #'''FEB42''': no dead channels | ||
− | # | + | ====FEBM==== |
− | # ''' | + | #'''FEBM5''': no dead channels |
− | # ''' | + | #'''FEBM2''': no dead channels |
− | # ''' | + | #'''FEBM7''': 1 dead channel |
− | # ''' | + | #'''FEBM4''': 1 dead channel |
− | # ''' | + | #'''FEBM1''': 1 dead channel |
− | # ''' | + | #'''FEBM6''': 1 dead channel |
+ | #'''FEBM8''': 1 dead channel | ||
+ | #'''FEBM3''': 1 dead channel | ||
− | == Layer 2 == | + | ==Layer 2== |
Current number of good FEBs = 32/28 | Current number of good FEBs = 32/28 | ||
Line 261: | Line 282: | ||
[[L2 FEB pinout|L2 anode-FEB connector pinout]] | [[L2 FEB pinout|L2 anode-FEB connector pinout]] | ||
− | === HW_FEB list === | + | ===HW_FEB list=== |
{| class="wikitable" style="text-align: center; color: black;" | {| class="wikitable" style="text-align: center; color: black;" | ||
|- | |- | ||
− | ! scope="col" | HW_FEB | + | ! scope="col" |HW_FEB |
− | ! scope="col" | Status | + | ! scope="col" |Status |
− | ! scope="col" | Chip 1 | + | ! scope="col" |Chip 1 |
− | ! scope="col" | Chip 2 | + | ! scope="col" |Chip 2 |
− | ! scope="col" | Notes | + | ! scope="col" |Notes |
|- | |- | ||
− | | 1 | + | |1 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB1 Chip1|1]] | + | |[[L2 FEB1 Chip1|1]] |
− | | [[L2 FEB1 Chip2|2]] | + | |[[L2 FEB1 Chip2|2]] |
− | | old TB calibration | + | |old TB calibration |
|- | |- | ||
− | | 2 | + | |2 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB2 Chip1|1]] | + | |[[L2 FEB2 Chip1|1]] |
− | | [[L2 FEB2 Chip2|2]] | + | |[[L2 FEB2 Chip2|2]] |
− | | old TB calibration | + | |old TB calibration |
|- | |- | ||
− | | 3 | + | |3 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB3 Chip1|1]] | + | |[[L2 FEB3 Chip1|1]] |
− | | [[L2 FEB3 Chip2|2]] | + | |[[L2 FEB3 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 4 | + | |4 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB4 Chip1|1]] | + | |[[L2 FEB4 Chip1|1]] |
− | | [[L2 FEB4 Chip2|2]] | + | |[[L2 FEB4 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 5 | + | |5 |
− | | | + | |'''IHEP''' |
− | | [[L2 FEB5 Chip1|1]] | + | |[[L2 FEB5 Chip1|1]] |
− | | [[L2 FEB5 Chip2|2]] | + | |[[L2 FEB5 Chip2|2]] |
− | | | + | |SPARE |
|- | |- | ||
− | | 6 | + | |6 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB6 Chip1|1]] | + | |[[L2 FEB6 Chip1|1]] |
− | | [[L2 FEB6 Chip2|2]] | + | |[[L2 FEB6 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 7 | + | |7 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB7 Chip1|1]] | + | |[[L2 FEB7 Chip1|1]] |
− | | [[L2 FEB7 Chip2|2]] | + | |[[L2 FEB7 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 8 | + | |8 |
− | | Torino | + | |Torino |
− | | [[L2 FEB8 Chip1|1]] | + | |[[L2 FEB8 Chip1|1]] |
− | | [[L2 FEB8 Chip2|2]] | + | |[[L2 FEB8 Chip2|2]] |
− | | spare? already calibrated | + | |spare? already calibrated |
|- | |- | ||
− | | 9 | + | |9 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB9 Chip1|1]] | + | |[[L2 FEB9 Chip1|1]] |
− | | [[L2 FEB9 Chip2|2]] | + | |[[L2 FEB9 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 10 | + | |10 |
− | | AEMME | + | |AEMME |
− | | [[L2 FEB10 Chip1|1]] | + | |[[L2 FEB10 Chip1|1]] |
− | | [[L2 FEB10 Chip2|2]] | + | |[[L2 FEB10 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 11 | + | |11 |
− | | | + | |Torino |
− | | [[L2 FEB11 Chip1|1]] | + | |[[L2 FEB11 Chip1|1]] |
− | | [[L2 FEB11 Chip2|2]] | + | |[[L2 FEB11 Chip2|2]] |
− | | high noise and dead channels | + | |removed from L2 (Sep 2019) |
+ | |||
+ | high noise and dead channels | ||
|- | |- | ||
− | | 12 | + | |12 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB12 Chip1|1]] | + | |[[L2 FEB12 Chip1|1]] |
− | | [[L2 FEB12 Chip2|2]] | + | |[[L2 FEB12 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 13 | + | |13 |
− | | Torino | + | |Torino |
− | | [[L2 FEB13 Chip1|1]] | + | |[[L2 FEB13 Chip1|1]] |
− | | [[L2 FEB13 Chip2|2]] | + | |[[L2 FEB13 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 14 | + | |14 |
− | | Torino | + | |Torino |
− | | [[L2 FEB14 Chip1|1]] | + | |[[L2 FEB14 Chip1|1]] |
− | | [[L2 FEB14 Chip2|2]] | + | |[[L2 FEB14 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 15 | + | |15 |
− | | Torino | + | |Torino |
− | | [[L2 FEB15 Chip1|1]] | + | |[[L2 FEB15 Chip1|1]] |
− | | [[L2 FEB15 Chip2|2]] | + | |[[L2 FEB15 Chip2|2]] |
− | | spare? already calibrated | + | |spare? already calibrated |
|- | |- | ||
− | | 16 | + | |16 |
− | | Torino | + | |Torino |
− | | [[L2 FEB16 Chip1|1]] | + | |[[L2 FEB16 Chip1|1]] |
− | | [[L2 FEB16 Chip2|2]] | + | |[[L2 FEB16 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 17 | + | |17 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB17 Chip1|1]] | + | |[[L2 FEB17 Chip1|1]] |
− | | [[L2 FEB17 Chip2|2]] | + | |[[L2 FEB17 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 18 | + | |18 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB18 Chip1|1]] | + | |[[L2 FEB18 Chip1|1]] |
− | | [[L2 FEB18 Chip2|2]] | + | |[[L2 FEB18 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 19 | + | |19 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB19 Chip1|1]] | + | |[[L2 FEB19 Chip1|1]] |
− | | [[L2 FEB19 Chip2|2]] | + | |[[L2 FEB19 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 20 | + | |20 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB20 Chip1|1]] | + | |[[L2 FEB20 Chip1|1]] |
− | | [[L2 FEB20 Chip2|2]] | + | |[[L2 FEB20 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 21 | + | |21 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB21 Chip1|1]] | + | |[[L2 FEB21 Chip1|1]] |
− | | [[L2 FEB21 Chip2|2]] | + | |[[L2 FEB21 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 22 | + | |22 |
− | | Torino | + | |Torino |
− | | [[L2 FEB22 Chip1|1]] | + | |[[L2 FEB22 Chip1|1]] |
− | | [[L2 FEB22 Chip2|2]] | + | |[[L2 FEB22 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 23 | + | |23 |
− | | Torino | + | |Torino |
− | | [[L2 FEB23 Chip1|1]] | + | |[[L2 FEB23 Chip1|1]] |
− | | [[L2 FEB23 Chip2|2]] | + | |[[L2 FEB23 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 24 | + | |24 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB24 Chip1|1]] | + | |[[L2 FEB24 Chip1|1]] |
− | | [[L2 FEB24 Chip2|2]] | + | |[[L2 FEB24 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 25 | + | |25 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB25 Chip1|1]] | + | |[[L2 FEB25 Chip1|1]] |
− | | [[L2 FEB25 Chip2|2]] | + | |[[L2 FEB25 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 26 | + | |26 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB26 Chip1|1]] | + | |[[L2 FEB26 Chip1|1]] |
− | | [[L2 FEB26 Chip2|2]] | + | |[[L2 FEB26 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 27 | + | |27 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB27 Chip1|1]] | + | |[[L2 FEB27 Chip1|1]] |
− | | [[L2 FEB27 Chip2|2]] | + | |[[L2 FEB27 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 28 | + | |28 |
− | | | + | |'''IHEP''' |
− | | [[L2 FEB28 Chip1|1]] | + | |[[L2 FEB28 Chip1|1]] |
− | | [[L2 FEB28 Chip2|2]] | + | |[[L2 FEB28 Chip2|2]] |
− | | | + | |DAQ debug tests |
|- | |- | ||
− | | 29 | + | |29 |
− | | | + | |Torino |
− | | [[L2 FEB29 Chip1|1]] | + | |[[L2 FEB29 Chip1|1]] |
− | | [[L2 FEB29 Chip2|2]] | + | |[[L2 FEB29 Chip2|2]] |
− | | missing TP on chip 1 | + | |removed from L2 (Sep 2019) |
+ | |||
+ | missing TP on chip 1 | ||
|- | |- | ||
− | | 30 | + | |30 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB30 Chip1|1]] | + | |[[L2 FEB30 Chip1|1]] |
− | | [[L2 FEB30 Chip2|2]] | + | |[[L2 FEB30 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 31 | + | |31 |
− | | Torino | + | |Torino |
− | | [[L2 FEB31 Chip1|1]] | + | |[[L2 FEB31 Chip1|1]] |
− | | [[L2 FEB31 Chip2|2]] | + | |[[L2 FEB31 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 32 | + | |32 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB32 Chip1|1]] | + | |[[L2 FEB32 Chip1|1]] |
− | | [[L2 FEB32 Chip2|2]] | + | |[[L2 FEB32 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 33 | + | |33 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB33 Chip1|1]] | + | |[[L2 FEB33 Chip1|1]] |
− | | [[L2 FEB33 Chip2|2]] | + | |[[L2 FEB33 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 34 | + | |34 |
− | | | + | |Torino |
− | | [[L2 FEB34 Chip1|1]] | + | |[[L2 FEB34 Chip1|1]] |
− | | [[L2 FEB34 Chip2|2]] | + | |[[L2 FEB34 Chip2|2]] |
− | | chip dead due to water leakage | + | |removed from L2 (November 2019) |
+ | |||
+ | chip dead due to water leakage | ||
|- | |- | ||
− | | 35 | + | |35 |
− | | | + | |Ferrara (Angelo) |
− | | [[L2 FEB35 Chip1|1]] | + | |[[L2 FEB35 Chip1|1]] |
− | | [[L2 FEB35 Chip2|2]] | + | |[[L2 FEB35 Chip2|2]] |
− | | | + | |ch.30 dead on chip 1 |
|- | |- | ||
− | | 36 | + | |36 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB36 Chip1|1]] | + | |[[L2 FEB36 Chip1|1]] |
− | | [[L2 FEB36 Chip2|2]] | + | |[[L2 FEB36 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 37 | + | |37 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB37 Chip1|1]] | + | |[[L2 FEB37 Chip1|1]] |
− | | [[L2 FEB37 Chip2|2]] | + | |[[L2 FEB37 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 38 | + | |38 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB38 Chip1|1]] | + | |[[L2 FEB38 Chip1|1]] |
− | | [[L2 FEB38 Chip2|2]] | + | |[[L2 FEB38 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 39 | + | |39 |
− | | Torino | + | |Torino |
− | | [[L2 FEB39 Chip1|1]] | + | |[[L2 FEB39 Chip1|1]] |
− | | [[L2 FEB39 Chip2|2]] | + | |[[L2 FEB39 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 49 | + | |49 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB49 Chip1|1]] | + | |[[L2 FEB49 Chip1|1]] |
− | | [[L2 FEB49 Chip2|2]] | + | |[[L2 FEB49 Chip2|2]] |
− | | installed on Nov 2019 | + | |installed on Nov 2019 |
|- | |- | ||
− | | 50 | + | |50 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB50 Chip1|1]] | + | |[[L2 FEB50 Chip1|1]] |
− | | [[L2 FEB50 Chip2|2]] | + | |[[L2 FEB50 Chip2|2]] |
− | | installed on Sep 2019 | + | |installed on Sep 2019 |
|- | |- | ||
− | | 51 | + | |51 |
− | | Torino | + | |Torino |
− | | [[L2 FEB51 Chip1|1]] | + | |[[L2 FEB51 Chip1|1]] |
− | | [[L2 FEB51 Chip2|2]] | + | |[[L2 FEB51 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 52 | + | |52 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB52 Chip1|1]] | + | |[[L2 FEB52 Chip1|1]] |
− | | [[L2 FEB52 Chip2|2]] | + | |[[L2 FEB52 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 53 | + | |53 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB53 Chip1|1]] | + | |[[L2 FEB53 Chip1|1]] |
− | | [[L2 FEB53 Chip2|2]] | + | |[[L2 FEB53 Chip2|2]] |
− | | installed on Nov 2019 | + | |installed on Nov 2019 |
|- | |- | ||
− | | 54 | + | |54 |
− | | Torino | + | |Torino |
− | | [[L2 FEB54 Chip1|1]] | + | |[[L2 FEB54 Chip1|1]] |
− | | [[L2 FEB54 Chip2|2]] | + | |[[L2 FEB54 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 55 | + | |55 |
− | | | + | |'''IHEP''' |
− | | [[L2 FEB55 Chip1|1]] | + | |[[L2 FEB55 Chip1|1]] |
− | | [[L2 FEB55 Chip2|2]] | + | |[[L2 FEB55 Chip2|2]] |
− | | | + | |SPARE |
|- | |- | ||
− | | 56 | + | |56 |
− | | '''installed on L2''' | + | |'''installed on L2''' |
− | | [[L2 FEB56 Chip1|1]] | + | |[[L2 FEB56 Chip1|1]] |
− | | [[L2 FEB56 Chip2|2]] | + | |[[L2 FEB56 Chip2|2]] |
− | | installed on Sep 2019 | + | |installed on Sep 2019 |
|- | |- | ||
− | | 57 | + | |57 |
− | | | + | |'''IHEP''' |
− | | [[L2 FEB57 Chip1|1]] | + | |[[L2 FEB57 Chip1|1]] |
− | | [[L2 FEB57 Chip2|2]] | + | |[[L2 FEB57 Chip2|2]] |
− | | installed on Sep 2019, | + | |installed on Sep 2019, |
removed on Nov 2019 | removed on Nov 2019 | ||
− | good! | + | good SPARE! |
|- | |- | ||
− | | 58 | + | |58 |
− | | | + | |'''IHEP''' |
− | | [[L2 FEB58 Chip1|1]] | + | |[[L2 FEB58 Chip1|1]] |
− | | [[L2 FEB58 Chip2|2]] | + | |[[L2 FEB58 Chip2|2]] |
− | | | + | |SPARE |
|- | |- | ||
|} | |} | ||
− | === Spare FEBs ranking === | + | ===Spare FEBs ranking=== |
+ | |||
+ | ====OLD==== | ||
+ | #<del>'''FEB57''': no dead channels<del> | ||
+ | #<del>'''FEB55''': no dead channels<del> | ||
+ | #<del>'''FEB58''': no dead channels<del> | ||
+ | #'''FEB5''': 1 dead channel | ||
+ | |||
+ | ====NEW==== | ||
+ | #<del>'''FEB70''': no dead channels<del> | ||
+ | #<del>'''FEB54''': no dead channels<del> | ||
+ | #<del>'''FEB61''': no dead channels<del> | ||
+ | #<del>'''FEB62''': no dead channels<del> | ||
+ | #<del>'''FEB66''': no dead channels<del> | ||
+ | #<del>'''FEB64''': no dead channels<del> | ||
+ | #<del>'''FEB71''': 1 dead channel<del> | ||
+ | #<del>'''FEB69''': 1 dead channel<del> | ||
+ | #<del>'''FEB72''': 1 dead channel<del> | ||
+ | #<del>'''FEB65''': 1 dead channel<del> | ||
+ | #'''FEB67''': 2 dead channels | ||
+ | |||
+ | ====OTHER==== | ||
+ | #<del>'''FEB31''': no dead channels<del> | ||
+ | #<del>'''FEB15''': no dead channels<del> | ||
+ | #'''FEB8''': no dead channels | ||
+ | #<del>'''FEB63''': no dead channels<del> | ||
+ | #<del>'''FEB59''': no dead channels<del> | ||
+ | |||
− | # ''' | + | ====JULY 2023==== |
− | # ''' | + | #'''FEB74''': no dead channels |
− | # ''' | + | #'''FEB51''': no dead channels |
− | # ''' | + | #'''FEB77''': no dead channels |
+ | #'''FEB78''': 1 dead channel | ||
+ | #'''FEB79''': 2 dead channels | ||
+ | #'''FEB76''': 2 dead channels | ||
+ | #'''FEB73''': 3 dead channels | ||
− | == Layer 3 == | + | ==Layer 3== |
Current number of good FEBs = 38/36 | Current number of good FEBs = 38/36 | ||
Line 584: | Line 642: | ||
[[L3 FEB pinout|L3 anode-FEB connector pinout]] | [[L3 FEB pinout|L3 anode-FEB connector pinout]] | ||
− | === HW_FEB list === | + | ===HW_FEB list=== |
{| class="wikitable" style="text-align: center; color: black;" | {| class="wikitable" style="text-align: center; color: black;" | ||
|- | |- | ||
− | ! scope="col" | HW_FEB | + | ! scope="col" |HW_FEB |
− | ! scope="col" | Status | + | ! scope="col" |Status |
− | ! scope="col" | Chip 1 | + | ! scope="col" |Chip 1 |
− | ! scope="col" | Chip 2 | + | ! scope="col" |Chip 2 |
− | ! scope="col" | Notes | + | ! scope="col" |Notes |
|- | |- | ||
− | | 1 | + | |1 |
− | | NOT OK (2 old dead channels | + | |Torino |
+ | |[[L3 FEB1 Chip1|1]] | ||
+ | |[[L3 FEB1 Chip2|2]] | ||
+ | |NOT OK (2 old dead channels | ||
+ config and 8/10b errors) | + config and 8/10b errors) | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 2 | + | |2 |
− | | ''' | + | |'''IHEP''' |
− | | [[L3 FEB2 Chip1|1]] | + | |[[L3 FEB2 Chip1|1]] |
− | | [[L3 FEB2 Chip2|2]] | + | |[[L3 FEB2 Chip2|2]] |
− | | | + | |'''OK''' (1 old dead channel) |
|- | |- | ||
− | | 3 | + | |3 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB3 Chip1|1]] | ||
+ | |[[L3 FEB3 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 4 | + | |4 |
− | | | + | | |
− | | [[L3 FEB4 Chip1|1]] | + | |[[L3 FEB4 Chip1|1]] |
− | | [[L3 FEB4 Chip2|2]] | + | |[[L3 FEB4 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 5 | + | |5 |
− | | | + | |Ferrara (planar) |
− | | [[L3 FEB5 Chip1|1]] | + | |[[L3 FEB5 Chip1|1]] |
− | | [[L3 FEB5 Chip2|2]] | + | |[[L3 FEB5 Chip2|2]] |
− | | | + | |'''OK''' (planar) |
|- | |- | ||
− | | 6 | + | |6 |
− | | AEMME | + | |AEMME |
− | | [[L3 FEB6 Chip1|1]] | + | |[[L3 FEB6 Chip1|1]] |
− | | [[L3 FEB6 Chip2|2]] | + | |[[L3 FEB6 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 7 | + | |7 |
− | | | + | |Torino |
− | | [[L3 FEB7 Chip1|1]] | + | |[[L3 FEB7 Chip1|1]] |
− | | [[L3 FEB7 Chip2|2]] | + | |[[L3 FEB7 Chip2|2]] |
− | | | + | |NOT OK (config errors) |
|- | |- | ||
− | | 8 | + | |8 |
− | | | + | |Ferrara (planar) |
− | | [[L3 FEB8 Chip1|1]] | + | |[[L3 FEB8 Chip1|1]] |
− | | [[L3 FEB8 Chip2|2]] | + | |[[L3 FEB8 Chip2|2]] |
− | | | + | |NOT OK (2 noisy channels) |
− | + | '''OK''' (noisy channels solved, planar) | |
− | |||
|- | |- | ||
− | | 9 | + | |9 |
− | | | + | |Ferrara (planar) |
− | | [[L3 FEB9 Chip1|1]] | + | |[[L3 FEB9 Chip1|1]] |
− | | [[L3 FEB9 Chip2|2]] | + | |[[L3 FEB9 Chip2|2]] |
− | | | + | |'''OK''' (planar) |
|- | |- | ||
− | | 10 | + | |10 |
− | | | + | | |
− | | [[L3 FEB10 Chip1|1]] | + | |[[L3 FEB10 Chip1|1]] |
− | | [[L3 FEB10 Chip2|2]] | + | |[[L3 FEB10 Chip2|2]] |
− | | | + | | Dead due to water leakage in Ferrara (02.12.2020) |
|- | |- | ||
− | | 11 | + | |11 |
|Torino | |Torino | ||
− | | [[L3 FEB11 Chip1|1]] | + | |[[L3 FEB11 Chip1|1]] |
− | | [[L3 FEB11 Chip2|2]] | + | |[[L3 FEB11 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 12 | + | |12 |
− | | | + | |Ferrara (planar) |
− | | [[L3 FEB12 Chip1|1]] | + | |[[L3 FEB12 Chip1|1]] |
− | | [[L3 FEB12 Chip2|2]] | + | |[[L3 FEB12 Chip2|2]] |
− | | | + | |'''OK''' (planar) |
|- | |- | ||
− | | 13 | + | |13 |
− | | | + | |Ferrara (planar) |
− | | [[L3 FEB13 Chip1|1]] | + | |[[L3 FEB13 Chip1|1]] |
− | | [[L3 FEB13 Chip2|2]] | + | |[[L3 FEB13 Chip2|2]] |
− | | | + | |'''OK''' (planar) |
|- | |- | ||
− | | 14 | + | |14 |
− | |Angelo | + | |Ferrara (Angelo) |
− | | [[L3 FEB14 Chip1|1]] | + | |[[L3 FEB14 Chip1|1]] |
− | | [[L3 FEB14 Chip2|2]] | + | |[[L3 FEB14 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 15 | + | |15 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB15 Chip1|1]] | ||
+ | |[[L3 FEB15 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 16 | + | |16 |
− | | | + | |Ferrara (GEM discharges) |
− | | [[L3 FEB16 Chip1|1]] | + | |[[L3 FEB16 Chip1|1]] |
− | | [[L3 FEB16 Chip2|2]] | + | |[[L3 FEB16 Chip2|2]] |
− | | | + | |NOT OK (2 dead channels, 1 old + 1 new) |
|- | |- | ||
− | | 17 | + | |17 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB17 Chip1|1]] | ||
+ | |[[L3 FEB17 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 18 | + | |18 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB18 Chip1|1]] | ||
+ | |[[L3 FEB18 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 19 | + | |19 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB19 Chip1|1]] | ||
+ | |[[L3 FEB19 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 20 | + | |20 |
− | | ''' | + | |'''IHEP''' |
− | | [[L3 FEB20 Chip1|1]] | + | |[[L3 FEB20 Chip1|1]] |
− | | [[L3 FEB20 Chip2|2]] | + | |[[L3 FEB20 Chip2|2]] |
− | | | + | |'''OK''' |
− | |||
− | |||
|- | |- | ||
− | | 21 | + | |21 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB21 Chip1|1]] | ||
+ | |[[L3 FEB21 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 22 | + | |22 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB22 Chip1|1]] | ||
+ | |[[L3 FEB22 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 23 | + | |23 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB23 Chip1|1]] | ||
+ | |[[L3 FEB23 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 24 | + | |24 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB24 Chip1|1]] | ||
+ | |[[L3 FEB24 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 25 | + | |25 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB25 Chip1|1]] | ||
+ | |[[L3 FEB25 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 26 | + | |26 |
− | | | + | |Ferrara (planar) |
− | | [[L3 FEB26 Chip1|1]] | + | |[[L3 FEB26 Chip1|1]] |
− | | [[L3 FEB26 Chip2|2]] | + | |[[L3 FEB26 Chip2|2]] |
− | | | + | |'''OK''' (planar) |
|- | |- | ||
− | | 27 | + | |27 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB27 Chip1|1]] | ||
+ | |[[L3 FEB27 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 28 | + | |28 |
− | | | + | | |
− | | [[L3 FEB28 Chip1|1]] | + | |[[L3 FEB28 Chip1|1]] |
− | | [[L3 FEB28 Chip2|2]] | + | |[[L3 FEB28 Chip2|2]] |
− | | | + | |chip 2 had damaged bonding while on Ferrara planar setup |
|- | |- | ||
− | | 29 | + | |29 |
− | | | + | |Ferrara (planar) |
− | | [[L3 FEB29 Chip1|1]] | + | |[[L3 FEB29 Chip1|1]] |
− | | [[L3 FEB29 Chip2|2]] | + | |[[L3 FEB29 Chip2|2]] |
− | | | + | |'''OK''' (planar) |
|- | |- | ||
− | | 30 | + | |30 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB30 Chip1|1]] | ||
+ | |[[L3 FEB30 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 31 | + | |31 |
− | | | + | |Torino |
− | | [[L3 FEB31 Chip1|1]] | + | |[[L3 FEB31 Chip1|1]] |
− | | [[L3 FEB31 Chip2|2]] | + | |[[L3 FEB31 Chip2|2]] |
− | | | + | |NOT OK (8/10b errors due to damaged bonds) |
|- | |- | ||
− | | 32 | + | |32 |
− | | | + | |Ferrara (planar) |
− | | [[L3 FEB32 Chip1|1]] | + | |[[L3 FEB32 Chip1|1]] |
− | | [[L3 FEB32 Chip2|2]] | + | |[[L3 FEB32 Chip2|2]] |
− | | | + | |'''OK''' (planar) |
|- | |- | ||
− | | 33 | + | |33 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB33 Chip1|1]] | ||
+ | |[[L3 FEB33 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 34 | + | |34 |
|Torino | |Torino | ||
− | | [[L3 FEB34 Chip1|1]] | + | |[[L3 FEB34 Chip1|1]] |
− | | [[L3 FEB34 Chip2|2]] | + | |[[L3 FEB34 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 35 | + | |35 |
− | | ''' | + | |'''IHEP''' |
− | | [[L3 FEB35 Chip1|1]] | + | |[[L3 FEB35 Chip1|1]] |
− | | [[L3 FEB35 Chip2|2]] | + | |[[L3 FEB35 Chip2|2]] |
− | | | + | |'''OK''' |
|- | |- | ||
− | | 36 | + | |36 |
− | | ''' | + | |'''IHEP''' |
− | | [[L3 FEB36 Chip1|1]] | + | |[[L3 FEB36 Chip1|1]] |
− | | [[L3 FEB36 Chip2|2]] | + | |[[L3 FEB36 Chip2|2]] |
− | | | + | |'''OK''' (1 dead channel) |
|- | |- | ||
− | | 37 | + | |37 |
− | | ''' | + | |'''IHEP''' |
− | | [[L3 FEB37 Chip1|1]] | + | |[[L3 FEB37 Chip1|1]] |
− | | [[L3 FEB37 Chip2|2]] | + | |[[L3 FEB37 Chip2|2]] |
− | | | + | |'''OK''' |
|- | |- | ||
− | | 38 | + | |38 |
|Torino | |Torino | ||
− | | [[L3 FEB38 Chip1|1]] | + | |[[L3 FEB38 Chip1|1]] |
− | | [[L3 FEB38 Chip2|2]] | + | |[[L3 FEB38 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 39 | + | |39 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB39 Chip1|1]] | ||
+ | |[[L3 FEB39 Chip2|2]] | ||
|'''OK''' (1 "dead" channel --> stuck Efine) | |'''OK''' (1 "dead" channel --> stuck Efine) | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 40 | + | |40 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB40 Chip1|1]] | ||
+ | |[[L3 FEB40 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 41 | + | |41 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB41 Chip1|1]] | ||
+ | |[[L3 FEB41 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 42 | + | |42 |
− | | | + | |Ferrara (Angelo) |
− | | [[L3 FEB42 Chip1|1]] | + | |[[L3 FEB42 Chip1|1]] |
− | | [[L3 FEB42 Chip2|2]] | + | |[[L3 FEB42 Chip2|2]] |
− | | | + | |NOT OK (1 new dead, old dead is alive) |
|- | |- | ||
− | | 43 | + | |43 |
− | | Torino | + | |Torino |
− | | [[L3 FEB43 Chip1|1]] | + | |[[L3 FEB43 Chip1|1]] |
− | | [[L3 FEB43 Chip2|2]] | + | |[[L3 FEB43 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 44 | + | |44 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB44 Chip1|1]] | ||
+ | |[[L3 FEB44 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 45 | + | |45 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB45 Chip1|1]] | ||
+ | |[[L3 FEB45 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 46 | + | |46 |
|Torino | |Torino | ||
− | | [[L3 FEB46 Chip1|1]] | + | |[[L3 FEB46 Chip1|1]] |
− | | [[L3 FEB46 Chip2|2]] | + | |[[L3 FEB46 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 47 | + | |47 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB47 Chip1|1]] | ||
+ | |[[L3 FEB47 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 48 | + | |48 |
+ | |'''IHEP''' | ||
+ | |[[L3 FEB48 Chip1|1]] | ||
+ | |[[L3 FEB48 Chip2|2]] | ||
|'''OK''' | |'''OK''' | ||
− | |||
− | |||
− | |||
|- | |- | ||
− | | 49 | + | |49 |
− | | | + | |Ferrara (GEM discharges) |
− | | [[L3 FEB49 Chip1|1]] | + | |[[L3 FEB49 Chip1|1]] |
− | | [[L3 FEB49 Chip2|2]] | + | |[[L3 FEB49 Chip2|2]] |
− | | | + | |NOT OK (3 new dead channels) |
|- | |- | ||
− | | 50 | + | |50 |
|Torino | |Torino | ||
− | | [[L3 FEB50 Chip1|1]] | + | |[[L3 FEB50 Chip1|1]] |
− | | [[L3 FEB50 Chip2|2]] | + | |[[L3 FEB50 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 51 | + | |51 |
− | |Angelo | + | |Ferrara (Angelo) |
− | | [[L3 FEB51 Chip1|1]] | + | |[[L3 FEB51 Chip1|1]] |
− | | [[L3 FEB51 Chip2|2]] | + | |[[L3 FEB51 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 52 | + | |52 |
− | |Angelo | + | |Ferrara (Angelo) |
− | | [[L3 FEB52 Chip1|1]] | + | |[[L3 FEB52 Chip1|1]] |
− | | [[L3 FEB52 Chip2|2]] | + | |[[L3 FEB52 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 53 | + | |53 |
− | |Torino | + | |Torino (TB spare) |
− | | [[L3 FEB53 Chip1|1]] | + | |[[L3 FEB53 Chip1|1]] |
− | | [[L3 FEB53 Chip2|2]] | + | |[[L3 FEB53 Chip2|2]] |
− | | | + | |'''OK''' (chip 2 has 1 dead channel) |
|- | |- | ||
− | | 54 | + | |54 |
|Torino | |Torino | ||
− | | [[L3 FEB54 Chip1|1]] | + | |[[L3 FEB54 Chip1|1]] |
− | | [[L3 FEB54 Chip2|2]] | + | |[[L3 FEB54 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 55 | + | |55 |
− | | ''' | + | |'''IHEP''' |
− | | [[L3 FEB55 Chip1|1]] | + | |[[L3 FEB55 Chip1|1]] |
− | | [[L3 FEB55 Chip2|2]] | + | |[[L3 FEB55 Chip2|2]] |
− | | | + | |'''OK''' (1 "dead" channel --> stuck Efine) |
|- | |- | ||
− | | 56 | + | |56 |
− | | ''' | + | |'''IHEP''' |
− | | [[L3 FEB56 Chip1|1]] | + | |[[L3 FEB56 Chip1|1]] |
− | | [[L3 FEB56 Chip2|2]] | + | |[[L3 FEB56 Chip2|2]] |
− | | | + | |'''OK''' |
|- | |- | ||
− | | 57 | + | |57 |
− | | ''' | + | |'''IHEP''' |
− | | [[L3 FEB57 Chip1|1]] | + | |[[L3 FEB57 Chip1|1]] |
− | | [[L3 FEB57 Chip2|2]] | + | |[[L3 FEB57 Chip2|2]] |
− | | | + | |'''OK''' |
|- | |- | ||
− | | 58 | + | |58 |
− | | Torino | + | |Torino (TB spare) |
− | | [[L3 FEB58 Chip1|1]] | + | |[[L3 FEB58 Chip1|1]] |
− | | [[L3 FEB58 Chip2|2]] | + | |[[L3 FEB58 Chip2|2]] |
− | | | + | |'''OK''' |
|- | |- | ||
− | | 59 | + | |59 |
− | | Torino | + | |Torino |
− | | [[L3 FEB59 Chip1|1]] | + | |[[L3 FEB59 Chip1|1]] |
− | | [[L3 FEB59 Chip2|2]] | + | |[[L3 FEB59 Chip2|2]] |
− | | | + | | |
|- | |- | ||
− | | 60 | + | |60 |
− | | Torino | + | |Torino |
− | | [[L3 FEB60 Chip1|1]] | + | |[[L3 FEB60 Chip1|1]] |
− | | [[L3 FEB60 Chip2|2]] | + | |[[L3 FEB60 Chip2|2]] |
− | | | + | | |
|- | |- | ||
|} | |} | ||
Line 964: | Line 1,019: | ||
FEBs currently used to readout planar GEMs were installed on L3 "out side" | FEBs currently used to readout planar GEMs were installed on L3 "out side" | ||
− | === Spare FEBs ranking === | + | ===Spare FEBs ranking=== |
Latest revision as of 08:47, 11 July 2023
Here the status of all FEBs is reported.
Calibration files for each chip can be found at the following link:
https://github.com/fabio-cossio/TIGER
Contents
Layer 1[edit | edit source]
Current number of good FEBs = 20/16
HW_FEB list[edit | edit source]
HW_FEB | Status | Chip 1 | Chip 2 | Notes |
---|---|---|---|---|
1 | Torino | 1 | 2 | broken connector |
2 | installed on L1 | 1 | 2 | IHEP (in) |
3 | back to Torino | 1 | 2 | |
4 | installed on L1 | 1 | 2 | IHEP (out) |
5 | installed on L1 | 1 | 2 | IHEP (in) |
6 | back to Torino | 1 | 2 | missing calibration files |
7 | Torino | 1 | 2 | broken ESD protection diode |
8 | Torino | 1 | 2 | 1 dead channel (chip 1)
+ config errors (chip 2) |
9 | IHEP | 1 | 2 | SPARE (Tx align when tilted?) |
10 | installed on L1 | 1 | 2 | IHEP (in) (old TB calibration) |
11 | left on oL1 | 1 | 2 | |
12 | Torino | 1 | 2 | leakage |
13 | IHEP | 1 | 2 | broken ESD protection diodes and Res
repaired, SPARE |
14 | left on oL1 | 1 | 2 | |
15 | 1 | 2 | missing | |
16 | IHEP | 1 | 2 | SPARE |
17 | left on oL1 | 1 | 2 | |
18 | back to Torino | 1 | 2 | |
19 | installed on L1 | 1 | 2 | IHEP (out) |
20 | left on oL1 | 1 | 2 | old TB calibration |
21 | installed on L1 | 1 | 2 | IHEP (in) |
22 | installed on L1 | 1 | 2 | IHEP (out) |
23 | back to Torino | 1 | 2 | |
24 | installed on L1 | 1 | 2 | IHEP (out) |
25 | installed on L1 | 1 | 2 | IHEP (in) |
26 | installed on L1 | 1 | 2 | IHEP (out) |
27 | installed on L1 | 1 | 2 | IHEP (out) |
28 | IHEP | 1 | 2 | SPARE |
29 | installed on L1 | 1 | 2 | IHEP (in) |
30 | installed on L1 | 1 | 2 | IHEP (out) |
31 | Torino | 1 | 2 | |
32 | installed on L1 | 1 | 2 | IHEP (out) |
33 | Torino | 1 | 2 | 1 dead channel (chip 1)
+ config errors (chip 2) |
34 | installed on L1 | 1 | 2 | IHEP (in) |
35 | Torino | 1 | 2 | |
61 | installed on L1 | 1 | 2 | IHEP (in)(old production) |
New production starting from FEB 26 (10 FEBs --> FEB26-35)
Spare FEBs ranking[edit | edit source]
OLD[edit | edit source]
FEB10: no dead channels (old TB calibration)- FEB13: no dead channels (repaired ESD protection circuit components)
- FEB16: 1 dead channel
- FEB28: 2 dead channels
- FEB9: 2 dead channels + Tx align issues when tilted
FEB33: 1 dead channel (chip 2 config errors) --> DO NOT USEFEB8: 1 dead channel (chip 2 config errors) --> DO NOT USE
JULY 2023[edit | edit source]
- FEB38: no dead channels
- FEB41: no dead channels
- FEB42: no dead channels
FEBM[edit | edit source]
- FEBM5: no dead channels
- FEBM2: no dead channels
- FEBM7: 1 dead channel
- FEBM4: 1 dead channel
- FEBM1: 1 dead channel
- FEBM6: 1 dead channel
- FEBM8: 1 dead channel
- FEBM3: 1 dead channel
Layer 2[edit | edit source]
Current number of good FEBs = 32/28
HW_FEB list[edit | edit source]
HW_FEB | Status | Chip 1 | Chip 2 | Notes |
---|---|---|---|---|
1 | installed on L2 | 1 | 2 | old TB calibration |
2 | installed on L2 | 1 | 2 | old TB calibration |
3 | installed on L2 | 1 | 2 | |
4 | installed on L2 | 1 | 2 | |
5 | IHEP | 1 | 2 | SPARE |
6 | installed on L2 | 1 | 2 | |
7 | installed on L2 | 1 | 2 | |
8 | Torino | 1 | 2 | spare? already calibrated |
9 | installed on L2 | 1 | 2 | |
10 | AEMME | 1 | 2 | |
11 | Torino | 1 | 2 | removed from L2 (Sep 2019)
high noise and dead channels |
12 | installed on L2 | 1 | 2 | |
13 | Torino | 1 | 2 | |
14 | Torino | 1 | 2 | |
15 | Torino | 1 | 2 | spare? already calibrated |
16 | Torino | 1 | 2 | |
17 | installed on L2 | 1 | 2 | |
18 | installed on L2 | 1 | 2 | |
19 | installed on L2 | 1 | 2 | |
20 | installed on L2 | 1 | 2 | |
21 | installed on L2 | 1 | 2 | |
22 | Torino | 1 | 2 | |
23 | Torino | 1 | 2 | |
24 | installed on L2 | 1 | 2 | |
25 | installed on L2 | 1 | 2 | |
26 | installed on L2 | 1 | 2 | |
27 | installed on L2 | 1 | 2 | |
28 | IHEP | 1 | 2 | DAQ debug tests |
29 | Torino | 1 | 2 | removed from L2 (Sep 2019)
missing TP on chip 1 |
30 | installed on L2 | 1 | 2 | |
31 | Torino | 1 | 2 | |
32 | installed on L2 | 1 | 2 | |
33 | installed on L2 | 1 | 2 | |
34 | Torino | 1 | 2 | removed from L2 (November 2019)
chip dead due to water leakage |
35 | Ferrara (Angelo) | 1 | 2 | ch.30 dead on chip 1 |
36 | installed on L2 | 1 | 2 | |
37 | installed on L2 | 1 | 2 | |
38 | installed on L2 | 1 | 2 | |
39 | Torino | 1 | 2 | |
49 | installed on L2 | 1 | 2 | installed on Nov 2019 |
50 | installed on L2 | 1 | 2 | installed on Sep 2019 |
51 | Torino | 1 | 2 | |
52 | installed on L2 | 1 | 2 | |
53 | installed on L2 | 1 | 2 | installed on Nov 2019 |
54 | Torino | 1 | 2 | |
55 | IHEP | 1 | 2 | SPARE |
56 | installed on L2 | 1 | 2 | installed on Sep 2019 |
57 | IHEP | 1 | 2 | installed on Sep 2019,
removed on Nov 2019 good SPARE! |
58 | IHEP | 1 | 2 | SPARE |
Spare FEBs ranking[edit | edit source]
OLD[edit | edit source]
FEB57: no dead channelsFEB55: no dead channelsFEB58: no dead channels- FEB5: 1 dead channel
NEW[edit | edit source]
FEB70: no dead channelsFEB54: no dead channelsFEB61: no dead channelsFEB62: no dead channelsFEB66: no dead channelsFEB64: no dead channelsFEB71: 1 dead channelFEB69: 1 dead channelFEB72: 1 dead channelFEB65: 1 dead channel- FEB67: 2 dead channels
OTHER[edit | edit source]
FEB31: no dead channelsFEB15: no dead channels- FEB8: no dead channels
FEB63: no dead channelsFEB59: no dead channels
JULY 2023[edit | edit source]
- FEB74: no dead channels
- FEB51: no dead channels
- FEB77: no dead channels
- FEB78: 1 dead channel
- FEB79: 2 dead channels
- FEB76: 2 dead channels
- FEB73: 3 dead channels
Layer 3[edit | edit source]
Current number of good FEBs = 38/36
HW_FEB list[edit | edit source]
HW_FEB | Status | Chip 1 | Chip 2 | Notes |
---|---|---|---|---|
1 | Torino | 1 | 2 | NOT OK (2 old dead channels
+ config and 8/10b errors) |
2 | IHEP | 1 | 2 | OK (1 old dead channel) |
3 | IHEP | 1 | 2 | OK |
4 | 1 | 2 | ||
5 | Ferrara (planar) | 1 | 2 | OK (planar) |
6 | AEMME | 1 | 2 | |
7 | Torino | 1 | 2 | NOT OK (config errors) |
8 | Ferrara (planar) | 1 | 2 | NOT OK (2 noisy channels)
OK (noisy channels solved, planar) |
9 | Ferrara (planar) | 1 | 2 | OK (planar) |
10 | 1 | 2 | Dead due to water leakage in Ferrara (02.12.2020) | |
11 | Torino | 1 | 2 | |
12 | Ferrara (planar) | 1 | 2 | OK (planar) |
13 | Ferrara (planar) | 1 | 2 | OK (planar) |
14 | Ferrara (Angelo) | 1 | 2 | |
15 | IHEP | 1 | 2 | OK |
16 | Ferrara (GEM discharges) | 1 | 2 | NOT OK (2 dead channels, 1 old + 1 new) |
17 | IHEP | 1 | 2 | OK |
18 | IHEP | 1 | 2 | OK |
19 | IHEP | 1 | 2 | OK |
20 | IHEP | 1 | 2 | OK |
21 | IHEP | 1 | 2 | OK |
22 | IHEP | 1 | 2 | OK |
23 | IHEP | 1 | 2 | OK |
24 | IHEP | 1 | 2 | OK |
25 | IHEP | 1 | 2 | OK |
26 | Ferrara (planar) | 1 | 2 | OK (planar) |
27 | IHEP | 1 | 2 | OK |
28 | 1 | 2 | chip 2 had damaged bonding while on Ferrara planar setup | |
29 | Ferrara (planar) | 1 | 2 | OK (planar) |
30 | IHEP | 1 | 2 | OK |
31 | Torino | 1 | 2 | NOT OK (8/10b errors due to damaged bonds) |
32 | Ferrara (planar) | 1 | 2 | OK (planar) |
33 | IHEP | 1 | 2 | OK |
34 | Torino | 1 | 2 | |
35 | IHEP | 1 | 2 | OK |
36 | IHEP | 1 | 2 | OK (1 dead channel) |
37 | IHEP | 1 | 2 | OK |
38 | Torino | 1 | 2 | |
39 | IHEP | 1 | 2 | OK (1 "dead" channel --> stuck Efine) |
40 | IHEP | 1 | 2 | OK |
41 | IHEP | 1 | 2 | OK |
42 | Ferrara (Angelo) | 1 | 2 | NOT OK (1 new dead, old dead is alive) |
43 | Torino | 1 | 2 | |
44 | IHEP | 1 | 2 | OK |
45 | IHEP | 1 | 2 | OK |
46 | Torino | 1 | 2 | |
47 | IHEP | 1 | 2 | OK |
48 | IHEP | 1 | 2 | OK |
49 | Ferrara (GEM discharges) | 1 | 2 | NOT OK (3 new dead channels) |
50 | Torino | 1 | 2 | |
51 | Ferrara (Angelo) | 1 | 2 | |
52 | Ferrara (Angelo) | 1 | 2 | |
53 | Torino (TB spare) | 1 | 2 | OK (chip 2 has 1 dead channel) |
54 | Torino | 1 | 2 | |
55 | IHEP | 1 | 2 | OK (1 "dead" channel --> stuck Efine) |
56 | IHEP | 1 | 2 | OK |
57 | IHEP | 1 | 2 | OK |
58 | Torino (TB spare) | 1 | 2 | OK |
59 | Torino | 1 | 2 | |
60 | Torino | 1 | 2 |
FEBs currently used to readout planar GEMs were installed on L3 "out side"