Rate considerations

TIGER

CGEM-IT setup:

• clock frequency = 160 MHz
• 2 Tx links per chip running at 160 MHz SDR (Single Data Rate)

Chip maximum bandwidth = 160 MHz * 2 (Tx links) = 320 Mbit/s

1 event word = 64 bits --> 80 bits with 8b/10b encoding

Chip maximum rate = 320 Mbit/s / 80 bit/event = 4 M event/s = 4 MHz

Channel maximum rate = 4 MHz / 64 channels = 62.5 kHz per channel

Frameword rate = 4.8 kHz per chip (equivalent to 76 Hz per channel increase)

GEMROC

TRIGGER-MATCH

Assumptions:

• 25 kHz rate per channel (noise + physics)
• 1.5 us time window
• 8 TIGER (512 channels)
• Two 64-bit header and trailer words for GEMROC packet
• Maximum L1 trigger frequency = 4 kHz (BESIII constraint)

25 kHz per channel --> 1.6 MHz per chip

Number of hits per trigger = 1.6 MHz * 1.5 us = 2.4 hit/packet

Average packet size = [2.4 hit/packet * 64 bits (event word size) * 8 (TIGER)] + [2 (header+trailer) * 64 bits] = 1228.8 bits + 128 bits = 1357 bits = 170 bytes

Maximum trigger-matched data rate = 170 bytes * 4 kHz = 680 kB/s = 5440 kbit/s per GEMROC

TRIGGER-LESS

Assumptions:

• 25 kHz rate per channel (noise + physics)

25 kHz per channel --> 1.6 MHz per chip

Trigger-less data rate = 1.6 MHz * 8 (TIGER) * 64 bits (event word size) = 819.2 Mbit/s = 103 MB/s per GEMROC

DAQ PC

1 GbE link

Maximum bandwidth = 1 Gbit/s = 125 MB/s

• Can easily accomodate data from more than 100 TM GEMROC modules
• Can only accomodate data from 1 TL GEMROC module
  • only if UDP communication is optimized
  • valid only for average rate, does not take into account rate peaks
  • the DAQ PC in clean room is able to reach only ~300 Mb/s = 37.5 MB/s