Difference between revisions of "TIGER - GEMROC efficiency"
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Both the devices (GEMROC and TIGER) are designed to allow a rate up to 60 kHz per channel (3840 kHz per chip). This measure confirms the performances in the communication between one GEMROC and one TIGER. | Both the devices (GEMROC and TIGER) are designed to allow a rate up to 60 kHz per channel (3840 kHz per chip). This measure confirms the performances in the communication between one GEMROC and one TIGER. | ||
| − | Efficiency starts to decrease due to bandwidth limit (63 kHz x 64 channels = 4 MHz) | + | Efficiency starts to decrease due to bandwidth limit (63 kHz x 64 channels = 4 MHz) of the chip: |
| + | * 2 Tx links at 160 MHz (SDR) allow up to 320 Mbit/s | ||
| + | * 4 MHz * 80 bit/hit = 320 Mbit/s | ||
=== Digital test pulses on one channel === | === Digital test pulses on one channel === | ||
Revision as of 03:14, 1 June 2019
Contents
Triggerless efficiency[edit | edit source]
The triggerless efficiency has ben measured with one TIGER and one GEMROC. The acquisition was set in triggerless mode and the TP are generated by the GEMROC itself. The GEMROC generate N TPs after each Frameword received from the chip. The time between the TPs is set by another parameter. This parameter was set to make the TP emission homogeneous with respect to the time.
The data are then decoded and, with a simple script, the efficiency is calculated as the rate between the expected number of test pulse (N times the number of frame-words acquired) and the number of TP registered by the system.
Digital test pulses on 64 channels[edit | edit source]
| TP per frameword | Event Rate (kHz) | Efficency |
|---|---|---|
| 1 | 4.8 | 100% |
| 2 | 9.8 | 100% |
| 12 | 58.6 | 100% |
| 13 | 63.4 | 98% |
Both the devices (GEMROC and TIGER) are designed to allow a rate up to 60 kHz per channel (3840 kHz per chip). This measure confirms the performances in the communication between one GEMROC and one TIGER. Efficiency starts to decrease due to bandwidth limit (63 kHz x 64 channels = 4 MHz) of the chip:
- 2 Tx links at 160 MHz (SDR) allow up to 320 Mbit/s
- 4 MHz * 80 bit/hit = 320 Mbit/s
Digital test pulses on one channel[edit | edit source]
| TP per frameword | Event Rate (kHz) | Efficency |
|---|---|---|
| 20 | 97.7 | 100% |
| 22 | 107 | 100% |
| 25 | 122 | 100% |
| 30 | 146 | 100% |
| 35 | 170 | 100% |
| 37 | 180 | 100% |
| 40 | 195 | 90% |
Analog test pulses on one channel[edit | edit source]
| TP per frameword | Event Rate (kHz) | Efficency |
|---|---|---|
| 10 | 48.8 | 100% |
| 22 | 107 | 100% |
| 25 | 122 | 100% |
| 30 | 146 | 100% |
| 37 | 180 | 100% |
| 38 | 185 | 93% |
